As customers continue to push for smaller, higher-performance integrated circuits (ICs), IC manufacturers continue their efforts to squeeze more transistors and other components onto smaller dies. For example, the present trend is toward memory circuits that have greater storage capacities but that are no larger than their predecessors.
One technique for increasing an IC's component density is to reduce the minimum feature size of a process--the minimum allowable width of, e.g., a transistor gate or an interconnection line--and thus reduce the sizes of the components themselves. Although manufacturers have made great strides in this area over the last few years, there are problems, such as degradation of transistor performance at smaller sizes, that they must overcome before the minimum feature size can be further reduced.
Another density-increasing technique is to use silicon-trench isolation (STI) instead of local oxidation of a semiconductor (LOCOS). But although STI significantly increases the ratio of usable to unusable substrate area as compared to LOCOS, the widths of the STI regions can be no narrower than the minimum feature size, and thus cannot be reduced until the minimum feature size is reduced.